Idrive controller no power9/15/2023 ![]() ![]() hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. DMA: preallocated 1024 KiB pool for atomic coherent allocations pinctrl core: initialized pinctrl subsystem futex hash table entries: 1024 (order: 4, 65536 bytes) ![]() clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns VFP support v0.3: implementor 41 architecture 3 part 40 variant 3 rev 4 CPU: Virtualization extensions available. SMP: Total of 4 processors activated (153.60 BogoMIPS). Setting up static identity map for 0x100000 - 0x10003c Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) Calibrating delay loop (skipped), value calculated using timer frequency. Switching to timer-based delay loop, resolution 52ns sched_clock: 56 bits at 19MHz, resolution 52ns, wraps every 4398046511078ns clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x46d987e47, max_idle_ns: 440795202767 ns arch_timer: cp15 timer(s) running at 19.20MHz (phys). NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 ftrace: allocating 26399 entries in 78 pages SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 Virtual kernel memory layout:įixmap : 0xffc00000 - 0xfff00000 (3072 kB) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Kernel command line: coherent_pool=1M 8250.nr_uarts=1 cma=256M vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000 dwc_otg.lpm_enable=0 console=ttyAMA0,115200 console=tt圓 consoleblank=0 loglevel=0 root=PARTUUID=38df017e-02 rootfstype=ext4 elevator=deadline fsck.repair=yes rootwait quiet splash logo.nologo vt.global_cursor_default=0 plymouth.ignore-serial-consoles Built 1 zonelists, mobility grouping on. random: get_random_bytes called from start_kernel+0xac/0x4b4 with crng_init=0 Normal zone: 196608 pages, LIFO batch:63 OF: fdt: Machine model: Raspberry Pi 3 Model B Plus Rev 1.3 CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache CPU: div instructions available: patching division code CPU: ARMv7 Processor revision 4 (ARMv7), cr=10c5383d ![]()
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